Thus, an insulated conductor track is formed on the surface of the semiconductor body. Other conductor tracks can be provided over such a conductor track insulated at its upper side by the top layer and at its side edges by side edge insulation. The conductor track may be made, for example, of polycrystalline silicon or a metal, such as aluminium, while its insulation may be made, for example, of silicon oxide, silicon nitride, silicon oxynitride or another insulating material, such as, for example, aluminium oxide. The insulating top layer and the side edge insulation may also be made of different insulating materials. Such an insulated conductor track may be used in the semiconductor device, for example, as gate electrode and is then isolated from the semiconductor body by a thin layer of gate oxide, but use as an electrode connected to a semiconductor zone disposed in the semiconductor body or as a conductor interconnecting circuit elements in the semiconductor device is also possible.
A method of the kind mentioned in the opening paragraph is known from Published European Patent No. 081,999, in which, as an insulated conductor track, a gate electrode of a MOS transistor is formed. Semiconductor zones constituting the source and drain zones of this transistor are contacted with a metallization extending above the gate electrode. The first and second etching treatments, which are carried out in this known method, etch the conductive layer and the first insulating layer anisotropically so that the conductor track and the top layer disposed thereon have side edges directed substantially at right angles to the surface. As a result, the side edge insulation can be provided in a simple manner described.
A disadvantage of the known method is that in practice, when a metallization is provided over the insulated conductors that are formed, leakage currents or even shortcircuits can occur between the insulated conductors and this metallization.